In a photolithography process, which is one type of process for manufacturing a semiconductor device, a resist pattern is formed on a semiconductor wafer (hereinafter referred to as a wafer) which is a substrate. In order to form the resist pattern, for example, the wafer is transferred to a coating and developing apparatus for coating and developing a resist and is subjected to a resist coating process. Thereafter, the wafer is transferred to an exposure apparatus connected to the coating and developing apparatus and is exposed along a desired pattern.
The peripheral edge portion of the front surface of the wafer is configured as an inclined surface descending outward. Further, in the above-described coating and developing apparatus, there may be loaded a wafer (hereinafter sometimes referred to as a polished wafer) on which formation of a film and removal of the film by CMP (Chemical Mechanical Polishing) are performed in a manufacturing process of a semiconductor device until the wafer is loaded into the coating and developing apparatus. The formation of the film and the removal of the film may be repeated a plurality of times. As the number of repetitions increases, an edge roll-off amount, which is a difference (drop amount) between the height of the upper end of the inclined surface and the height at a position shifted by a predetermined distance from the upper end of the inclined surface toward the outside of the wafer, tends to increase.
Moreover, in the above-described exposure apparatus, leveling correction is performed in which the wafer is inclined so that the focus surface and the front surface of the wafer in the region to be subjected to an exposure process are aligned with each other. When an exposure process is performed in a peripheral edge region including the peripheral edge portion of the wafer and a more inner side than the peripheral edge portion, the focus surface and the front surface of the wafer can be aligned by the leveling correction on the more inner side than the peripheral edge portion of the wafer. However, if the aforementioned edge roll-off is relatively large in the peripheral edge portion, namely if the difference in height between the focus surface and the front surface of the wafer is relatively large, defocusing (focus abnormality) may occur. In such a case, the size of a CD (Critical Dimension) which is a line width of a resist pattern may be changed from a designed value. Thus, the yield of semiconductor products in the peripheral edge region decreases. Under the foregoing circumstances, there is a need to maintain a CD at a designed value even in the peripheral edge region and to raise the yield of semiconductor products. In a Patent Document 1, an exposure apparatus is disclosed which is provided with a leveling sensor for measuring the height of a front surface of a substrate. However, a method for solving the above problem is not disclosed.
[Patent Document]
Patent Document 1: Japanese Application Publication No.: 2010-219528